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Микросхема PIC32MX360F512L-80I/PT, Микроконтроллер 32 бита, PIC32 …

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284,20 руб.

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Склад №110-12 дней284,20руб.264,31руб.255,78руб.250,10руб.241,57руб.227,36руб.221,68руб.
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Склад №25-7 дней534,30руб.491,67руб.483,14руб.471,77руб.454,72руб.429,14руб.417,77руб.
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Склад №35-7 дней542,82руб.500,19руб.488,82руб.477,46руб.454,72руб.431,98руб.423,46руб.
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Склад №410 дней341,04руб.312,62руб.306,94руб.298,41руб.289,88руб.272,83руб.264,31руб.
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Склад №57 дней494,51руб.454,72руб.443,35руб.434,83руб.420,62руб.395,04руб.383,67руб.
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Склад №610-12 дней309,78руб.287,04руб.278,52руб.272,83руб.264,31руб.247,25руб.241,57руб.

Характеристики

PIC32MX360F512L-80I/PT, Микроконтроллер 32 бита, PIC32 …The PIC32MX360F512L-80I/PT is a 32-bit 100-pin 512kB high-performance General Purpose Microcontroller. The CPU fetches instructions, decodes each instruction, fetches source operands, executes each instruction and writes the results of instruction execution to the destinations. The MIPS32® M4K® processor core contains several logic blocks working together in parallel, providing an efficient high-performance computing engine. The MIPS® M4K® processor core offers many power management features, including low-power design, active power management and power-down modes of operation. The core is a static design that supports slowing or halting the clocks, which reduces system power consumption during idle periods.

• MCU core — MIPS16e mode for up to 40% smaller code size, fast context switch and interrupt response
• MCU system — 4-channel hardware DMA controller and programmable vector interrupt controller
• Analogue — Fast and accurate 16-channel 10-bit ADC
• Power management modes — Run, idle and sleep modes
• Debug — 8 hardware breakpoints (6 instruction and 2 data), 2-wire programming, debugging interface
• Fail-safe clock monitor — Allows safe shutdown if clock fails
• Hardware RTCC (real-time clock and calendar with alarms)
• 2 Internal oscillators (8MHz and 31kHz)
• Watchdog timer with separate RC oscillator
• Pin compatible with 16-bit PIC® MCUs
• Multiple interrupt vectors with individually programmable priority