Микросхема SN74HCT373DW, 8-битный триггер-защелка D-типа с тремя …

Характеристики

SN74HCT373DW, 8-битный триггер-защелка D-типа с тремя …The SN74HCT373DW is an octal transparent D Latch with 3-state outputs. It is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. While the LE input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs. An OE input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect the internal operations of the latches.

• High-current 3-state true outputs can drive up to 15 LSTTL loads
• Typical tpd = 21ns
• Inputs are TTL-voltage compatible
• Full parallel access for loading
• 80µA Maximum low power consumption
• ±6mA Output drive at 5V
• 1µA Maximum low input current
• Green product and no Sb/Br