SN74LVTH245APW, Микросхема, TSSOP20

Характеристики

SN74LVTH245APW, Микросхема, TSSOP20The SN74LVTH245APW is an octal Bus Transceiver designed specifically for low-voltage (3.3V) VCC operation, but with the capability to provide a TTL interface to a 5V system environment. It is designed for asynchronous communication between data buses. It transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pull-up/pull-down resistors with the bus-hold circuitry is not recommended. It is fully specified for hot-insertion applications using IOFF and power-up 3-state.

• Support mixed-mode signal operation
• IOFF and power-up 3-state support hot insertion
• Bus hold on data inputs eliminates the need for external pull-up/pull-down resistors
• Support unregulated battery operation down to 2.7V
• Latch-up performance exceeds 500mA per JESD 17
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